The present invention relates to a manufacturing method of a semiconductor device. Particularly, the present invention is concerned with a semiconductor manufacturing technique capable of quickly investigating the cause of a defect generated in a semiconductor device manufacturing process.
The semiconductor device manufacturing process broadly comprises a pre-process (wafer process) in which integrated circuits are formed on a main surface (integrated circuit-forming surface) of a semiconductor wafer, e.g., a single crystal silicon wafer, by combining photolithography technique, CVD technique, sputtering technique and etching technique and a post-process (assembling process) in which the semiconductor wafer formed with the integrated circuits is diced into a plurality of semiconductor chips and then the semiconductor chips are each sealed into a package, e.g., a resin or ceramic package.
Semiconductor device manufacturers make management of products by indicating product information such as, for example, product model name, customer logo mark and production code on the surface of each semiconductor product (semiconductor package) manufactured through the above processes.
Patent Document 1 (Japanese Unexamined Patent Publication No. Hei 11 (1999)-008327) discloses a semiconductor chip identification putting method which permits management of each of plural semiconductor chips even after separation of the semiconductor chips from a semiconductor wafer by dicing.
More particularly, first with respect to plural semiconductor chips formed on a semiconductor wafer, wafer number and intra-wafer chip positions are determined as chip identification codes. Next, when the semiconductor chips thus given chip identification codes are separated from the semiconductor wafer by dicing and mounted onto a lead frame, a bar code corresponding to the above identification code of each of the semiconductor chips is affixed to a lead frame portion located near the semiconductor chip. This bar code is read by a bar code reader, then after assembly of an IC package, a bar code corresponding to the bar code read by the bar code reader is affixed to the back surface of the IC package. According to this semiconductor chip identification code putting method, even after assembly of the IC package, the manufacturing lot number and wafer number of the semiconductor chip incorporated in the IC package can be recognized by reading the bar code affixed to the package back surface. Consequently, it becomes possible to make a follow-up survey of, for example, conditions in the manufacturing stage.
Patent Document 2 (Japanese Unexamined Patent Publication No. 2004-022981) discloses a technique for indicating externally visible product information on both a package surface and a back surface of each chip mounting portion of a lead frame in a product wherein the chip mounting portion is exposed from the package back surface, like QFN (Quad Fat No lead package) or TSSOP (Thin Shrink Small Outline Package) out of small-sized semiconductor packages. According to Patent Document 2, pieces of product information low in commonness between product types, such as, for example, customer logo mark, product model name, product code and lot trace code, are indicated on the package surface, while pieces of product information high in commonness between products such as, for example, manufacturing nation code are indicated on the back surface of the chip mounting portion. The product information on the package surface is formed by printing, sealing or laser marking after package molding, while the product information on the back surface of the chip mounting portion is formed in advance by pressing or etching before start of package assembly.